CV / English / High-Speed SerDes Engineer

Evan R. Tiller

  • Address: 235 Techno Park Lane, Silicoville, EC 54321
  • Phone: (123) 456-7890
  • Email: [email protected]

Brief

A proficient High-Speed SerDes Engineer with over 8 years of experience in the design, analysis, and optimization of high-speed serial data communication systems. Adept in all phases of the project lifecycle, from concept through design and implementation to system integration and testing. Proven skills in developing innovative solutions to increase efficiency, enhance system performance and reduce latency in communication protocols. Possesses a solid understanding of electrical engineering principles, digital signal processing, and high-speed circuit design.

Core Competencies

  • High-Speed Circuit Design
  • SerDes Architectures
  • Signal Integrity Analysis
  • PHY Layer Optimization
  • PAM4 and NRZ Modulation Techniques
  • Jitter and Noise Mitigation
  • FPGA Programming and Prototyping
  • Cross-functional Team Leadership
  • Problem-solving and Analytical Skills

Technologies and Certifications

  • Languages: Verilog, VHDL, Python, C/C++
  • Tools: Cadence Allegro, ANSYS HFSS, MATLAB/Simulink, Keysight ADS
  • Certifications: Certified Interconnect Designer (CID), FPGA Design Professional

Professional Experience

Senior High-Speed SerDes Engineer XYZ Technologies Inc., Silicoville, EC Jan 2017 - Present - Led the design and implementation of a next-gen 112Gbps PAM4 SerDes project, achieving a 30% improvement in power efficiency over previous generations. - Conducted signal integrity analysis for high-speed PCB designs, reducing BER by 25%. - Collaborated closely with cross-functional teams to integrate SerDes solutions into broader system architectures, enhancing overall system performance.

High-Speed Circuit Design Engineer ABC Semiconductors, Techvalley, ST Jun 2013 - Dec 2016 - Developed and optimized FPGA-based prototypes for new SerDes IP, shortening the design cycle by 20%. - Implemented innovative DSP algorithms for improved signal quality, resulting in a 15% increase in data throughput. - Authored 5 technical papers on SerDes technology advancements published in renowned engineering journals.

Education and Training

Master of Science in Electrical Engineering University of Technology, Techville 2011 - 2013

Bachelor of Science in Electrical Engineering Institute of Engineering, Future City 2007 - 2011

Referees

Dr. Alice Martin Professor of Electrical Engineering University of Technology [email protected] (321) 654-0987

Mr. Carlos Reed Senior Engineer XYZ Technologies Inc. [email protected] (234) 567-8901